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Slipstream Processors: Improving both Performance and Fault Tolerance.

Patt, (ASPLOS 2010) MT on CMPs Jose Renau† Karin Strauss Luis Ceze Wei Liu Smruti Sarangi James Tuck Josep Torrellas; Energy-Efficient Thread-Level Speculation on a CMP S.

in 20th International Symposium on Computer Architecture, May 1993.

Transactional memory: Architectural support for lock-free data structures,.

We propose a novel FCMP architecture named FTPA (flexible tiled processor architecture), which provides an efficient platform for single thread execution.

The evaluation demonstrates that FTPA outperforms the state-of-art FCMP design, TFlex, by 19.2% on average. Federation: boosting per-thread performance of throughput-oriented manycore architectures[J].

In this paper, aiming at resource management in flexible architecture, an implementation of confidence predictor, referred as speculative depth estimator (SDE), is introduced, which is able to conduct the real-time resource tuning.Class meets MW 5- in CSE 4217 Schedule: Heterogeneous Cores: Conservation Cores: Reducing the Energy of Mature Computations Ganesh Venkatesh, Jack Sampson, Nathan Goulding, Saturnino Garcia, Vladyslav Bryksin, Jose Lugo-Martinez, Steven Swanson, Michael Bedford Taylor.